Modeling and Design Techniques for RF Power Amplifiers (eBook)

ARVIND RAGHAVAN is a Senior Design Engineer for the Intel Corporation. NUTTAPONG SRIRATTANA is a Senior Design Engineer at RF Micro Devices. JOY LASKAR holds the Schlumberger Chair in Microelectronics and is the founder and Director of the Georgia Electronic Design Center within the School of Electrical and Computer Engineering at the Georgia Institute of Technology.

Preface ix

1 Introduction 1

1.1 Semiconductor Technology and RF Power Amplifier Design 2

1.2 Device Modeling 3

1.3 Power Amplifier IC Design 4

1.4 Power Amplifier Linearity 5

1.5 Modulation Schemes 5

1.6 Circuit Simulation 9

1.7 Load-Pull Measurements 10

References 13

2 Device Modeling for CAD 15

2.1 Introduction 15

2.2 Bipolar Junction and Weterojunction Bipolar Transistors 16

2.3 Bipolar Device Models 18

2.3.1 The Ebers-Moll Model 18

2.3.2 The Gummel-Poon Model 20

2.3.3 The VBlC Model 25

2.3.4 MEXTRAM 29

2.3.5 HICUM 32

2.4 MOSFET Device Physics 35

2.5 MOSFET Device Models 38

2.5.1 The Level 1 Model 38

2.5.2 The Level 2 and Level 3 Models 40

2.5.3 BSlM 40

2.5.4 The BSIM2 and HSPICE Level 28 Models 43

2.5.5 BSIM3 44

2.5.6 MOS Model 9 and MOS Model 11 45

2.5.7 BSIM4 45

References 46

3 Empirical Modeling of Bipolar Devices 49

3.1 Introduction 49

3.1.1 Modeling the HBT versus the BJT 49

3.1.2 Parameter Extraction 50

3.1.3 Motivation for an Empirical Bipolar Device Model 51

3.1.4 Physics-Based and Empirical Models 53

3.1.5 Compatibility between Large- and Small-Signal Models 53

3.2 Model Construction and Parameter Extraction 54

3.2.1 Current Source Model 54

3.2.2 Current Source Model Parameter Extraction 56

3.2.3 Extraction of Intrinsic Capacitances 58

3.2.4 Extraction of Base Resistance 60

3.2.5 Parameter Extraction Procedure 61

3.3 Temperature-Dependent InGaP/GaAs HBT Large-Signal Model 63

3.4 Empirical Si BJT Large-Signal Model 71

3.5 Extension of the Empirical Modeling Method to the SiGe HBT 77

3.6 Summary 83

References 83

4 Scalable Modeling of RF MOSFETs 87

4.1 Introduction 87

4.1.1 NQS Effects 88

4.1.2 Distributed Gate Resistance 89

4.1.3 Distributed Substrate Resistance 89

4.2 Scalable Modified BSIM3v3 Model 91

4.2.1 Scalability of MOSFET Model 91

4.2.2 Extraction of Small-Signal Model Parameters 94

4.2.3 Scalable Substrate Network Modeling 101

4.2.4 Modified BSIM3v3 Model 116

4.3 Summary 120

References 120

5 Power Amplifieir IC Design 123

5.1 Introduction 123

5.2 Power Amplifier Design Methodology 124

5.3 Classes of Operation 125

5.4 Performance Metrics 132

5.5 Thermal Instability and Ballasting 136

References 138

6 Power Amplifier Design in Silicon 141

6.1 Introduction 141

6.2 A 2.4-GHz High-Efficiency SiGe HBT Power Amplifier 142

6.2.1 Circuit Design Considerations 143

6.2.2 Analysis of Ballasting for SiGe HBT Power Amplifiers 146

6.2.3 Harmonic Suppression Filter and Output Match Network 148

6.2.4 Performance of the Power Amplifier Module 150

6.3 RF Power Amplifier Design Using Device Periphery Adjustment 153

6.3.1 Analysis of the Device Periphery Adjustment Technique 155

6.3.2 1.9-GHz CMOS Power Amplifier 157

6.3.3 1.9-GHz CDMA/PCS SiGe HBT Power Amplifier 162

6.3.4 Nonlinear Term Cancellation for Linearity Improvement 166

References 169

7 Efficiency Enhancement of RF Power Amplifiers 173

7.1 Introduction 173

7.2 Efficiency Enhancement Techniques 174

7.2.1 Envelope Elimination and Restoration 174

7.2.2 Bias Adaptation 175

7.2.3 The Doherty Amplifier Technique 175

7.2.4 Chireix's Outphasing Amplifier Technique 176

7.3 The Classical Doherty Amplifier 179

7.4 The Multistage Doherty Amplifier 181

7.4.1 Principle of Operation 181

7.4.2 Analysis of Efficiency 186

7.4.3 Practical Considerations 188

7.4.4 Measurement Results 190

References 198

Index 199