On-Chip ESD Protection for Integrated Circuits
Springer-Verlag New York Inc.
978-1-4757-7574-7 (ISBN)
Testing models and standards adopted by U.S. Department of Defense, EIA/JEDEC, ESD Association, Automotive Electronics Council, International Electrotechnical Commission, etc.
ESD failure analysis, protection devices, and protection of sub-circuits
Whole-chip ESD protection and ESD-to-circuit interactions
Advanced low-parasitic compact ESD protection structures for RF and mixed-signal IC's
Mixed-mode ESD simulation-design methodologies for design prediction ESD-to-circuit interactions, and more!
Many real world ESD protection circuit design examples are provided. The book can be used as a reference book for working IC designers and as a textbook for students in the IC design field.
Albert Z.H. Wang received his PhD in Electrical Engineering from The State University of New York at Buffalo in 1995. After working for National Semiconductor Corporation in Santa Clara, CA, as a Staff R&D Engineer, he joined the Electrical and Computer Engineering Department at Illinois Institute of Technology in 1998. His research interests and publications center on analog, mixed-signal, RF and SoC IC design, on-chip ESD protection circuit design, IC CAD, and other closely related subjects.
ESD Test Models.- ESD Protection Device Solutions.- ESD Protection Circuit Solutions.- Advanced ESD Protection.- ESD Failure Analysis and Modeling.- Layout and Technology Influences on ESD Protection Circuit Design.- ESD Simulation-design Methodologies.- ESD-circuit Interactions.- Conclusion Remarks and Future Work.
Erscheint lt. Verlag | 23.3.2013 |
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Reihe/Serie | The Springer International Series in Engineering and Computer Science ; 663 |
Zusatzinfo | XVI, 303 p. |
Verlagsort | New York, NY |
Sprache | englisch |
Maße | 155 x 235 mm |
Themenwelt | Technik ► Elektrotechnik / Energietechnik |
ISBN-10 | 1-4757-7574-1 / 1475775741 |
ISBN-13 | 978-1-4757-7574-7 / 9781475775747 |
Zustand | Neuware |
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